SIGOPS ANNOUNCE monthly posting (08/01/2012)


  1. Announcements:
    * CEWIT20122012-07-30
    * RACES 20122012-08-06
    * Middleware 20122012-08-17
    * MW-Industrial 20122012-08-17
    IC2E 20132012-09-07
    COMSNETS 20132012-09-07
    * NetSys 20132012-09-17
    * MMSys 20132012-09-17
    ICPE 20132012-09-24
    * EuroSys 2013 Call for Papers2012-10-14
    * EuroSys 2013 Workshop Proposals2012-10-17

  2. (*= new this month)

  3. Special Announcements:

  4. About SIGOPS Announce mailing list
    How to unsubscribe, subscribe, and submit requests for announcements.




Title:The 9th International Conference & Expo on Emerging Technologies for a Smarter World (CEWIT2012)
Abstract Deadline:2012-07-30
Submission Deadline:2012-08-30
Dates:November, 5-6, 2012
Location:Songdo, Incheon, Korea
We cordially invite you to submit your contribution to the 9th International Conference & Expo on Emerging Technologies for a Smarter World (CEWIT2012). Originally known as the International Conference on Cutting-Edge Wireless & Information Technologies, this conference is organized by the Center of Excellence in Wireless and Information Technology (CEWIT) in the United States and CEWIT Korea. CEWIT2012 is the premier international forum on the applications of emerging technologies in infrastructure, healthcare, and energy, which are three of the most critical components of a smarter global environment


RACES 2012

Title:Relaxing Synchronization for Multicore and Manycore Scalability, SPLASH'12 Workshop
Submission Deadline:2012-08-06
Dates:October 21, 2012
Location:Tucson, Arizona, USA
Massively-parallel systems are coming. Conventional wisdom has been to utilize this parallelism by reducing synchronization to the minimum required to preserve determinism - in particular, by eliminating data races. However, Amdahl's law implies that on highly-parallel systems even a small amount of synchronization that introduces serialization will limit scaling. Thus, we are forced to confront the trade-off between synchronization and the ability of an implementation to scale performance with the number of processors: synchronization inherently limits parallelism. This workshop focuses on harnessing parallelism by limiting synchronization, even to the point where programs will compute inconsistent or approximate rather than exact answers.


Middleware 2012

Title:International Conference on Middleware
Submission Deadline:2012-08-17
Dates:Dec. 3-7, 2012
Location:Montreal, Canada
Middleware 2012, Call for Submissions: Industry Track Demonstrations Track Posters Track Industry Track Web: Demos and Posters Track Web:


MW-Industrial 2012

Title:Industrial Track of ACM/IFIP/USENIX 13th International Conference on Middleware
Submission Deadline:2012-08-17
Dates:December, 3-7, 2012
Location:Montreal, Quebec, CA
The Industrial Track of the Middleware 2012 Conference solicits papers for presentation at the conference and inclusion in the ACM Digital Library. The topics of interest are similar to those in the general conference call for papers. However, the purpose of the Industrial Track is to emphasize practical experience and to disseminate information of particular interest to developers and others involved in real-world systems.

IC2E 2013

Title:IEEE International Conference on Cloud Engineering
Abstract Deadline:2012-09-07
Submission Deadline:2012-09-14
Dates:Mar. 25-27, 2013
Location:San Francisco, CA
The IEEE International Conference on Cloud Engineering (IC2E) is a new conference that seeks to provide a high-quality and comprehensive forum, where researchers and practitioners involved in the development of cloud infrastructure and applications can exchange information on engineering principles, enabling technologies, and practical experiences as related to cloud computing. By bringing together experts that work on different levels of the cloud stack - systems, storage, networking, platforms, databases, and applications, IC2E will offer an end-to-end view on the challenges and technologies in cloud computing, foster research that addresses the interaction between different layers of the stack, and ultimately help shape the future of cloud-transformed business and society.


Title:The 5th International Conference on Communication Systems and Networks
Abstract Deadline:2012-09-07
Submission Deadline:2012-09-14
Dates:January, 7-10, 2013
Location:Bangalore, India
COMSNETS is a premier international conference dedicated to addressing advances in networking, communications systems, and telecommunications services. The goal of the conference is to create a world-class gathering of researchers from academia and industry, practitioners, business leaders, intellectual property experts, and venture capitalists, providing a forum for discussing cutting-edge research, and directions for new innovative business and technology. The conference will include a highly selective technical program of papers accepted from the open call, a small set of invited papers on important and timely topics from well-known leaders in the field, and poster sessions of work in progress.


NetSys 2013

Title:International Conference on Networked Systems 2013
Submission Deadline:2012-09-17
Dates:03, 11-15, 2013
Location:Stuttgart, Germany
The Conference on Networked Systems (NetSys 2013) provides an international forum for engineers and scientists in academia, industry, and government to discuss innovations in the realm of networked systems - including aspects of networking, distributed systems, com-munications, middleware, and applications. This biennial conference is the major scientific event on networked systems in German-speaking countries and belongs to a series of conferences (Kommunikation in Verteilten Systemen, KiVS) that was founded more than 30 years ago. Presented papers will be archived in IEEE Xplore(R) (pending).


MMSys 2013

Title:ACM Multimedia Systems conference (MMSys'13)
Submission Deadline:2012-09-17
Dates:February 27 - March 1, 2013
Location:Oslo, Norway
MMSys provides a forum for researchers, engineers, and scientist to present and share their latest research findings in multimedia systems. While research about specific aspects of multimedia systems is regularly published in the various proceedings and transactions of the networking, OS, real-time system, and database communities, MMSys aims to cut across these domains in the context of multimedia data types. This provides a unique opportunity to view the intersections and interplay of the various approaches and solutions developed across these domains to deal with multimedia data types. Furthermore, MMSys provides an avenue for communicating research that addresses multimedia systems holistically.

ICPE 2013

Title:4th ACM/SPEC International Conference on Performance Engineering
Submission Deadline:2012-09-24
Dates:April, 21-24, 2013
Location:Prague, Czech Republic
The goal of the International Conference on Performance Engineering (ICPE) is to integrate theory and practice in the field of performance engineering by providing a forum for sharing ideas and experiences between industry and academia. ICPE is established as a joint meeting of the ACM Workshop on Software and Performance (WOSP) and the SPEC International Performance Evaluation Workshop (SIPEW). The conference brings together researchers and industry practitioners to share and present their experiences, discuss challenges, and report state-of-the-art and in-progress research on performance engineering of software and systems, including performance measurement, modeling, benchmark design, and run-time performance management.


EuroSys 2013 Call for Papers

Title:Call for Papers
Abstract Deadline:2012-10-14
Submission Deadline:2012-10-20
Dates:April, 15-17, 2013
Location:Prague, Czech Republic
The EuroSys conference series brings together professionals from academia and industry. It has a strong focus on systems research and development: operating systems, data base systems, real-time systems and middleware for networked, distributed, parallel, or embedded computing systems. EuroSys has become a premier forum for discussing various issues of systems software research and development, including implications related to hardware and applications.


EuroSys 2013 Workshop Proposals

Title:Call for Workshop Proposals
Submission Deadline:2012-10-17
Dates:April 14-17, 2013 Month
Location:Prague, Czech Republic
Contact Email:
Researchers and practitioners are invited to submit proposals for workshops to be held in conjunction with the EuroSys 2013 conference. The purpose of workshops is to provide a forum for exchanging opinions, presenting ideas, and discussing preliminary results in an interactive atmosphere.


The ACM-EATCS Edsger W. Dijkstra Prize in Distributed Computing is
awarded to outstanding papers on the principles of distributed
computing, whose significance and impact on the theory or practice of
distributed computing have been evident for at least ten years. The
prize is sponsored jointly by the ACM Symposium on Principles of
Distributed Computing (PODC) and the EATCS Symposium on Distributed
Computing (DISC).

The 2012 Prize Committee, composed of Marcos K. Aguilera (chair),
Dahlia Malkhi, Keith Marzullo, Alessandro Panconesi, Andrzej Pelc,
and Roger Wattenhofer has selected

  Maurice Herlihy, J. Eliot B. Moss, Nir Shavit, and Dan Touitou

to receive the 2012 Edsger W. Dijkstra Prize in Distributed Computing
for the following two outstanding papers:

  Maurice Herlihy and J. Eliot B. Moss.
  Transactional Memory: Architectural Support for Lock-Free Data Structures.
  20th Annual International Symposium on Computer Architecture,
  pages 289-300, May 1993.

  Nir Shavit and Dan Touitou.
  Software Transactional Memory.
  Distributed Computing 10(2):99-116, February 1997.
  (An earlier version appearing in the 14th ACM Symposium on
  Principles of Distributed Computing, pages 204-213, August 1995.)

These papers established the abstraction of Transactional Memory,
which has fundamentally changed parallel computing both in its
theoretical foundations and in its practice.

As with many influential papers, the work by Herlihy and Moss presents
a beguilingly simple idea: extend load-linked and store-conditional to
allow a processor to update a collection of locations atomically. This
idea arose from deep insights:

- By allowing the creator of a concurrent data structure to focus on
  what should be atomic rather than how it should be made atomic,
  transactional memory significantly raises the level of abstraction
  for parallel programs, thereby eliminating much of the complexity of
  lock-free programming.

- Because actual dynamic conflicts among operations are rare in
  well-written programs, a speculative implementation of atomicity can
  enjoy a significant performance advantage over more conservative

- Given that cache coherence protocols already track conflicts among
  processors, multi-location atomic update can be realized in hardware
  by introducing a small "transactional cache" and by making simple
  modifications to standard cache coherence protocols.

This last insight notwithstanding, Herlihy and Moss's proposal proved
too ambitious for the hardware of the day, and their work was largely
ignored within the architecture community for most of the following
decade. Within the theory community, however, it inspired multiple
explorations of the limits of software emulation, most notably the
Software Transactional Memory work of Shavit and Touitou.

Building on earlier universal non-blocking constructions, Shavit and
Touitou showed how to achieve lock freedom without the need for costly
recursive helping, and thus provide effective non-blocking multi-word
operations purely in software. It was the first work to demonstrate
that software transactions could, under the right circumstances,
outperform conservative locking.

In terms of fostering research, transactional memory has become a
truly transformative idea. For example, two years ago, the second
edition of the monograph by Harris, Larus, and Rajwar on Transactional
Memory listed over 350 papers in the field. Google Scholar reports
almost 1400 citations to Herlihy and Moss, and almost 1000 to Shavit
and Touitou. The annual TRANSACT workshop, sponsored by ACM SIGPLAN,
is now planning its eighth incarnation. In terms of practice, software
architects have developed dozens of runtime implementations, both
blocking and non-blocking, of dazzling algorithmic variety. At least
four major compilers, including gcc, now support transactional memory
in C++. Hardware implementations have been developed by Azul, Sun
(Oracle), AMD (on paper), IBM, and Intel.  The IBM and Intel
implementations, in particular, ensure that hardware support is here
to stay.

These two papers started the distributed computing research community
along the path towards the design of general multi-word transactions;
ones that in the future will most likely be based on a combination of
hardware, software, and language techniques. Transactional memory
serves as an outstanding example of how the distributed computing
community has influenced the world.


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